Very Large Scale Integration - this term started getting used in the 70s when thousands of MOSFETs were
integrated together to make one IC.
Image from https://www.computerhistory.org/
Some notable dates:
|Kilby & Noyce
|Mohamed M. Atalla & Dawon Kahng
|Intel 4004, 2300 transistors
|6502 CPU with 3510 transistors
|MOS technolog y
|Z80 CPU with 8500 transistors
|Introduction to VLSI Systems published
|Mead & Conway
|Intel 486 with 1M transistors
|Intel Pentium 3.1M transistors
|Intel Pentium 4 551M transistors
|Mac M1 Ultra 114B transistors
The first book I read about VLSI was by Carver Mead & Lynn Conway - Introduction to VLSI systems. It’s pretty dated now but still an interesting read, giving a general overview of the ideas involved.
I thought it would be fun to take our last group submission for MPW5 and get a cell count for all the designs and the total application. I didn’t count the shared ram support or filler cells (they just fill in the space between the cells we actually need for the design to work).
Function generator 2199 cells
VGA Clock 1892 cells
Frequency counter 1146 cells
RGB Mixer 1381 cells
Hack soc 4881 cells
teras 16970 cells
ALU74181 866 cells
vga demo 5823 cells
SiLife 46874 cells
wrapped_acorn_prng 3739 cells
HSV Mixer 4951 cells
SkullFET 847 cells
Summing across all designs we have a total of 91569 standard cells, but the number of transistors will be a lot higher.
A flip flop has around 30 transistors, whereas a single inverter has only 2.
Here’s the floorplan of our MPW5 submission:
You can read more about VLSI on the wikipedia page
Matt Venn's Zero To ASIC course is a real eye-opener to the possibilities of open source hardware. The course itself is a tour-de-force overview of almost all aspects of ASIC development from concept to GDSII. It's also great fun and regardless of your background or previous experience, you'll learn a lot and have a great deal of fun doing it. This course has inspired me to take the next step and submit my own design to efabless.