In this interview Thomas talks us through his Amateur satellite transceiver shuttle submission. We also discuss the differences between the Open Source tools and the industry standard ones he uses in his day job. Design repo: https://github.com/yrrapt/amsat_txrx_ic Caravel repo: https://github.com/yrrapt/caravel_amsat_txrx_ic Connect with Thomas on linkedin: https://www.linkedin.com/in/thomas-parry-60419468/

Almost exactly a year ago in March 2020 I started getting interested in Open Source ASIC tooling. I don’t remember exactly what sparked my interest, but I remember this talk by Tim Edwards at WOSH: Bootstrapping a real working design flow and sometime after seeing Adam Zeloof posting a picture of an ASIC implementation of pong. I began by investigating QFlow. The standard cells used by QFlow were from Oklahoma State University (OSU).

I’ve been wanting to try plotting or printing the GDS files from my first ASIC for a while, and finally I’ve had some time to have a play. I used KLayout because it’s easy to change colours, show and hide layers, and export to a high resolution PNG. I want to make a poster with 3 pictures inside: The whole chip, Zoomed into the VGA clock macro, Zoomed into the standard cells.

When I was first testing my designs inside Caravel, I was quite confused about all the GPIO options. Each pin has a range of options that can be configured by firmware running on the RISCV processor. Each pin can be driven from the processor or your custom design. The outputs have separate output enable lines for bi-directional signalling. I put together an experiment where I tried the most important options and checked the results in a simulation.