Interview With Dirk Koch and Nguyen Dao
One of the popular types of entries to MPW1 & 2 have been FPGAs. I have previously spoken with Arya Reais-Parsi about their FPGA project submitted to MPW1.
In MPW2 I noticed there were a couple of applications that seemed fairly advanced - especially FuseRISC: 2 RISCV processors with embedded FPGA fabric between them.
Dirk & Nguyen kindly allowed me to interview them about:
- their FABulous eFPGA framework,
- support for Yosys & NextPNR,
- parameterisation of the fabric,
- blockrams with OpenRAM,
- their MPW applications and previous tape-outs, and
- their experience with the open source tools.
- FABulous FPGA framework: https://github.com/FPGA-Research-Manchester/FABulous
- MPW2 applications:
- Fabric test: https://platform.efabless.com/projects/202
- FuseRISC: https://platform.efabless.com/projects/134