There continues to be a lot of interest about analogue design with the open source PDK.
To cover this interest, I’ve previously interviewed:
One of the big changes in MPW2 was the provision of more analogue support in the form of Caravan - a new harness. This is exciting because one of the key advantages of an ASIC over an FPGA is the mixed signal capability.
I’m keen to try an analogue project for MPW3, and to add support for analogue in the multi project tools.
To find out more about how to design for analogue I’m doing a livestream with Thomas on Monday 5th July at 7pm CEST. We’ll cover:
- Recap of his MPW1 transceiver design
- How have things improved for analogue with MPW2?
- What’s new in the transceiver design for MPW2?
- A demo of his workflow:
- Schematic capture & simulation
- Klayout drawing
- Extraction in magic
- Simulation with Pyspice & ngspice
- What was hard about MPW1/2?
- Q&A with audience
The livestream will be on the Zero to ASIC youtube channel. Go there now and click the reminder button to get a message when the livestream starts.