This is one of the first projects I hardened using OpenLane.
News update: my clock works!
Still can't quite believe I have a clock on my desk that is powered by a chip I designed! pic.twitter.com/O5c2omQYYp— Matthew Venn (@matthewvenn) March 31, 2022
It shows the time on an LCD panel. It will be part of my first tapeout.
After running the OpenLane ASIC flow, it results in a design that uses 180x180 microns (32000 square microns). As we have about 10e6 square microns in the user project area of the Google shuttle, I could potentially put about 300 of these on the ASIC!
For more information, check the project’s repository
This project taped out on MPW1.