A shuttle service is the same as a multi project wafer.

On 30th June 2020, Tim Ansell announced the collaboration between Google and Skywater to provide a free shuttle service in his FOSSI dialup talk.

These slides taken from his talk show the overview:

Caravel

Normally in an MPW you would have the whole die to yourself. In the Google/Skywater Shuttle all the designs will be within the user project area of the Caravel harness. Caravel has its own RISCV processor and a neat datasheet. The idea here is to make it easier to bring up and debug your designs at the cost of some area.

Read this post to find out what you could fit in the user space.

The Google shuttle will return chips in type of packaging called Wafer Level Chip Scale Packaging.

Requirements

Efabless have put up a page that has more details on the requirements for entry to the shuttle.

Course feedback

For a very long time I’ve been fascinated by ASICs and have been close to them in my professional life as well, but not really as much into the detail as I would want. It’s been a fascination since grad school at least, so I've been interested in seeing more open source alternatives crop up, and now with the skywater PDK and OpenLane it seemed like the right time. It’s still a bit hard to get the motivation to get started, it feels like a bit of a hurdle so when I saw this course I just jumped right on it. It felt like a perfect way to get started.

Klas Nordmark (digital course)