Once a chip design is complete, it is taped out for manufacturing.
This means sending the GDS2 files to the foundry.
The term “tape out” was coined in 70’s.
Historically, the ASIC design files were stored on magnetic tape.
The event of carrying out the tape to the foundry was thus called “tape out”.
The Zero To ASIC course took me on a fantastic journey from drawing and simulating a MOSFET, formal verification leading up to implementing a custom design with an open PDK and completely open source tools. The course is crammed full of interesting material with great pacing and support from Matt, and it's been a fantastic opportunity to meet other folks with shared interests and different backgrounds. The course has left me excited with opportunities for new projects and optimism for some working silicon!