Padring
We need to make sure we can package the IC after the wafer has been diced into individual dies.
A common way of packaging ICs is to connect them to a leadframe by bonding tiny wires between the leads of the leadframe and the pads on the die.
The big bond pads around the outside of the IC often include ESD protection diodes, Input/Output drivers and so on.
This picture shows raven, an IC from Efabless. You can see around the edge there are the big bond pads and the power and ground lines. This structure is called a padring.
The padring used in the Google shuttle is included in Caravel.
Course feedback
The part I enjoyed the most was going back to the Verilog and seeing test benches pass. In particular the waveform viewer. At the latter parts of course you're simulating the entire Caravel system on chip with a RISCV core. Being able to drill down into everything inside that core, I can log the program counter, I can log all the address and data buses and you can just see in exquisite detail what the system is doing, and it's doing that because I programmed it. Being able to drill down into that detail was really fascinating.