The silicon wafer is usually patterned with the mask set to make hundreds or thousands of the same IC.
Each of these ICs are then cut out of the wafer and are called dies.
The die is then somehow packaged. Often they are mounted to a leadframe and then moulded into a plastic packaging to make them larger and easier to handle.
Image from Sergei Frolov
Read more about how the dual in line package was created (DIP) in this Hackaday article
The Google shuttle will provide a type of packaging called Wafer Level Chip Scale Packaging.
For a very long time I’ve been fascinated by ASICs and have been close to them in my professional life as well, but not really as much into the detail as I would want. It’s been a fascination since grad school at least, so I've been interested in seeing more open source alternatives crop up, and now with the skywater PDK and OpenLane it seemed like the right time. It’s still a bit hard to get the motivation to get started, it feels like a bit of a hurdle so when I saw this course I just jumped right on it. It felt like a perfect way to get started.